software development phase中文是什么意思

發(fā)音:

中文翻譯
造句

軟件開發(fā)階段

software (電腦的)軟件，軟設(shè)備；程序設(shè)備；語言設(shè)備；程度系統(tǒng)；設(shè) ...
development n. 1.發(fā)展，發(fā)達(dá)；進(jìn)化。 2.展開；擴(kuò)充；開發(fā)。 3 ...
phase n. 1.形勢，局面，狀態(tài)；階級(jí)。 2.方面，側(cè)面。 3 ...
development software 開發(fā)軟件; 開發(fā)軟體
software development 軟件開發(fā)
development phase 發(fā)育階段; 開發(fā)階段
in the development phase 在發(fā)展階段
phase development 階段發(fā)育
agile software development 敏捷開發(fā); 敏捷軟件開發(fā)
application-development software 應(yīng)用開發(fā)軟件
basic software development 基礎(chǔ)軟件開發(fā)
computer software development 計(jì)算機(jī)軟件發(fā)展
computer software development company 計(jì)算機(jī)軟件開發(fā)公司
courseware development software 課件制作軟件
development of software engineering 軟件工程開發(fā)
dynamics of software development 微軟團(tuán)隊(duì)成功秘訣
embedded software development engineer 數(shù)碼嵌入式軟件開發(fā)工程師
fairchild software development system 仙童軟件開發(fā)系統(tǒng)
incremental software development 增量式軟件開發(fā)
interactive software development 交互式軟件開發(fā)
interactive software development tool 交互式軟件開發(fā)工具
large scale software development 大規(guī)模軟件開發(fā); 大型軟件開發(fā)
large-scale software development 大型軟件開發(fā), 大規(guī)模軟件開發(fā)
machine-independent software development 獨(dú)立于機(jī)器的軟件研究
medium-scale software development 中型軟件研制, 中型軟件開發(fā)

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例句與用法

At the end of every software development phase , such as srs and lld , we should re - estimate our software size and adjust our project plan
在每一個(gè)軟件開發(fā)階段的結(jié)束，正如srs和lld ,我們可以重新評(píng)估軟件的規(guī)模并調(diào)整我們的項(xiàng)目計(jì)劃。
At the end of every software development phase , such as srs and lld [ / b ] , we should re - estimate our software size and adjust our project plan
在每一個(gè)軟件開發(fā)階段的結(jié)束，正如srs和lld ,我們可以重新評(píng)估軟件的規(guī)模并調(diào)整我們的項(xiàng)目計(jì)劃。
This method is especially simple and easy to implement . furthermore , it fully capable of tracking digital control signals carried by 4 ~ 20ma analog signals ; during software development phase , we have completed signal collecting , lcd displaying , d / a converting of hart signal and ieee - 754 32 bit float point conversion . we used a simplified method in ieee - 754 32 bit compatible float point conversion based on the 24 bit integer and 16 bit decimal computation
在hart信號(hào)的解調(diào)外圍電路中采用遲滯比較電路實(shí)現(xiàn)波形的轉(zhuǎn)化，這種方法簡單、易實(shí)現(xiàn)，完全能夠跟蹤加載在4 20ma模擬信號(hào)上的數(shù)字控制信號(hào)；在軟件設(shè)計(jì)中，完成了hart信號(hào)的采集編程、 lcd顯示編程、 d a轉(zhuǎn)化控制編程和ieee - 75432位浮點(diǎn)數(shù)的轉(zhuǎn)化編程， ieee - 75432位浮點(diǎn)數(shù)轉(zhuǎn)化編程采用的是在最多滿足24位整數(shù)位和16位小數(shù)位的基礎(chǔ)上的一種簡化算法。

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